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» The Structure and Performance of Interpreters
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2000
ACM
15 years 11 months ago
Using Hardware Performance Monitors to Isolate Memory Bottlenecks
In this paper, we present and evaluate two techniques that use different styles of hardware support to provide data structure specific processor cache information. In one approach...
Bryan R. Buck, Jeffrey K. Hollingsworth
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
15 years 11 months ago
Enhanced Q-learning algorithm for dynamic power management with performance constraint
- This paper presents a novel power management techniques based on enhanced Q-learning algorithms. By exploiting the submodularity and monotonic structure in the cost function of a...
Wei Liu, Ying Tan, Qinru Qiu
ACMACE
2007
ACM
15 years 11 months ago
Rhythmism: a VJ performance system with maracas based devices
WeproposeanonconventionalVJperformancesystemrhythmismwhichusesan original maraca based device that has 2 different functions, material maraca and effect maraca. Rhythmism uses the...
Satoru Tokuhisa, Yukinari Iwata, Masa Inakage
MSS
1995
IEEE
148views Hardware» more  MSS 1995»
15 years 10 months ago
Client/Server data Serving for High-Performance Computing
This paper will attempt to examine the industry requirements for shared network data storage and sustained high speed (10’s to 100’s to thousands of megabytes per second) netw...
Chris Wood
EUC
2008
Springer
15 years 9 months ago
Performance Comparison of Techniques on Static Path Analysis of WCET
Static path analysis is a key process of Worst Case Execution Time (WCET) estimation, the objective of which is to find the execution path that has the largest execution time. Cur...
Mingsong Lv, Zonghua Gu, Nan Guan, Qingxu Deng, Ge...