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ISLPED
2005
ACM
102views Hardware» more  ISLPED 2005»
16 years 1 months ago
Snug set-associative caches: reducing leakage power while improving performance
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
Jia-Jhe Li, Yuan-Shin Hwang
GECCO
2003
Springer
16 years 22 days ago
Enhancing the Performance of GP Using an Ancestry-Based Mate Selection Scheme
The performance of genetic programming relies mostly on population-contained variation. If the population diversity is low then there will be a greater chance of the algorithm bein...
Rodney Fry, Andrew M. Tyrrell
199
Voted
ICSE
1999
IEEE-ACM
15 years 11 months ago
Experience with Performing Architecture Tradeoff Analysis
Software architectures, like complex designs in any field, embody tradeoffs made by the designers. However, these tradeoffs are not always made explicitly by the designers and the...
Rick Kazman, Mario Barbacci, Mark Klein, S. Jeromy...
CODES
2008
IEEE
15 years 9 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...
EUROSYS
2007
ACM
15 years 9 months ago
Enabling scalability and performance in a large scale CMP environment
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...