34202 search results - page 6420 / 6841 » The Tera computer system |
203
Voted
HIPEAC
2007
Springer
16 years 1 months ago
2007
Springer
Computer architects and designers rely heavily on simulation. The downside of simulation is that it is very time-consuming — simulating an industry-standard benchmark on today...
198
Voted
HIPEAC
2007
Springer
16 years 1 months ago
2007
Springer
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
238
Voted
HIPEAC
2007
Springer
16 years 1 months ago
2007
Springer
Abstract. Network processors are programmable devices that can process packets at a high speed. A network processor is typified by multithreading and heterogeneous multiprocessing...
252
Voted
ICCS
2007
Springer
16 years 1 months ago
2007
Springer
We present a Dynamic Data Driven Application System (DDDAS) to track 2D shapes across large pose variations by learning non-linear shape manifold as overlapping, piecewise linear s...
224
Voted
LCTRTS
2007
Springer
16 years 1 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...