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193
Voted
DAC
2008
ACM
16 years 8 months ago
A framework for block-based timing sensitivity analysis
Since process and environmental variations can no longer be ignored in high-performance microprocessor designs, it is necessary to develop techniques for computing the sensitiviti...
Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S...
186
Voted
DAC
2007
ACM
16 years 8 months ago
TROY: Track Router with Yield-driven Wire Planning
In this paper, we propose TROY, the first track router with yield-driven wire planning to optimize yield loss due to random defects. As the probability of failure (POF) computed f...
Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan
225
Voted
DAC
2007
ACM
16 years 8 months ago
Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
Ümit Y. Ogras, Diana Marculescu, Puru Choudha...
215
Voted
DAC
2003
ACM
16 years 8 months ago
Extending the lifetime of a network of battery-powered mobile devices by remote processing: a markovian decision-based approach
This paper addresses the problem of extending the lifetime of a batterypowered mobile host in a client-server wireless network by using task migration and remote processing. This ...
Peng Rong, Massoud Pedram
189
Voted
DAC
2004
ACM
16 years 8 months ago
Architecture-level synthesis for automatic interconnect pipelining
For multi-gigahertz synchronous designs in nanometer technologies, multiple clock cycles are needed to cross the global interconnects, thus making it necessary to have pipelined g...
Jason Cong, Yiping Fan, Zhiru Zhang
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