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ICCAD
2002
IEEE
73views Hardware» more  ICCAD 2002»
16 years 4 months ago
Shaping interconnect for uniform current density
As the VLSI technology scaling down, the electromigration problem becomes one of the major concerns in high-performance IC design for both power network and signal interconnects. ...
Muzhou Shao, D. F. Wong, Youxin Gao, Li-Pen Yuan, ...
AINA
2009
IEEE
16 years 2 months ago
An Energy Efficient Chain-Based Clustering Routing Protocol for Wireless Sensor Networks
— Wireless sensor network consisting of a large number of sensors is effective for gathering data in a variety of environments. Since the sensors operate on battery of limited po...
Jae Duck Yu, Kyung Tae Kim, Bo Yle Jung, Hee Yong ...
175
Voted
SC
2009
ACM
16 years 2 months ago
Allocator implementations for network-on-chip routers
The present contribution explores the design space for virtual channel (VC) and switch allocators in network-on-chip (NoC) routers. Based on detailed RTL-level implementations, we...
Daniel U. Becker, William J. Dally
DFT
2009
IEEE
154views VLSI» more  DFT 2009»
16 years 2 months ago
Dual-Layer Cooperative Error Control for Reliable Nanoscale Networks-on-Chip
We propose a framework that allows dual-layer cooperative error control in a nanoscale network-on-chip (NoC), to simultaneously improve reliability, performance and energy efficie...
Qiaoyan Yu, Paul Ampadu
243
Voted
NOCS
2009
IEEE
16 years 2 months ago
Best of both worlds: A bus enhanced NoC (BENoC)
While NoCs are efficient in delivering high throughput point-to-point traffic, their multi-hop operation is too slow for latency sensitive signals. In addition, NoCS are inefficie...
Ran Manevich, Isask'har Walter, Israel Cidon, Avin...