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ICES
2005
Springer
177views Hardware» more  ICES 2005»
16 years 11 days ago
Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
Andres Upegui, Eduardo Sanchez
ISPD
2004
ACM
150views Hardware» more  ISPD 2004»
16 years 8 days ago
Topology optimization of structured power/ground networks
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
Jaskirat Singh, Sachin S. Sapatnekar
DATE
2003
IEEE
152views Hardware» more  DATE 2003»
16 years 4 days ago
Synthesis of CMOS Analog Cells Using AMIGO
In this paper, a simulation-based synthesis tool, AMIGO, for analog cell sizing is presented. AMIGO is based upon genetic optimization techniques adapted to circuit sizing. A fram...
Ramy Iskander, Mohamed Dessouky, Maie Aly, Mahmoud...
ISPD
2003
ACM
92views Hardware» more  ISPD 2003»
16 years 3 days ago
Benchmarking for large-scale placement and beyond
Over the last five years the VLSI Placement community achieved great strides in the understanding of placement problems, developed new high-performance algorithms, and achieved i...
Saurabh N. Adya, Mehmet Can Yildiz, Igor L. Markov...
GLVLSI
2010
IEEE
154views VLSI» more  GLVLSI 2010»
15 years 12 months ago
Read-out schemes for a CNTFET-based crossbar memory
This paper investigates read-out schemes for a crossbar memory using CNTFET-based elements as cross-points. Two read-out schemes are presented in this paper; the first scheme bias...
Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi