6111 search results - page 120 / 1223 » Time, Hardware, and Uniformity |
174
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ICCAD
2006
IEEE
16 years 4 months ago
2006
IEEE
— In this paper, we propose a timing model reduction algorithm for hierarchical timing analysis based on a bicliquestar replacement technique. In hierarchical timing analysis, ea...
239
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DDECS
2006
IEEE
15 years 11 months ago
2006
IEEE
Abstract-- Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution times. Timing anomalies are counterintuitive...
185
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DATE
2008
IEEE
16 years 2 months ago
2008
IEEE
The prospective use of upcoming nanometer CMOS technology nodes (65nm, 45nm, and beyond) in bioelectronic interfaces is raising a number of important issues concerning circuit arc...
177
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ISQED
2007
IEEE
16 years 1 months ago
2007
IEEE
The virtual channel flow control (VCFC) provides an efficient implementation for on-chip networks. However, allocating the virtual channels (VCs) uniformly results in a waste of a...
202
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ARCS
2005
Springer
16 years 1 months ago
2005
Springer
In Ubiquitous computing small embedded sensor and computing nodes are the main enabling technologies. System programming for such small embedded systems is a challenging task invol...