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» Time, Hardware, and Uniformity
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197
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ISPD
1998
ACM
89views Hardware» more  ISPD 1998»
15 years 11 months ago
Filling and slotting: analysis and algorithms
In very deep-submicron VLSI, certain manufacturing steps – notably optical exposure, resist development and etch, chemical vapor deposition and chemical-mechanical polishing (CM...
Andrew B. Kahng, Gabriel Robins, Anish Singh, Huij...
DMTCS
2011
261views Mathematics» more  DMTCS 2011»
14 years 7 months ago
An expected polynomial time algorithm for coloring 2-colorable 3-graphs
Abstract. We present an algorithm that for 2-colorable 3-uniform hypergraphs, finds a 2-coloring in average running time O(n5 log2 n).
Yury Person, Mathias Schacht
CORR
2010
Springer
157views Education» more  CORR 2010»
15 years 7 months ago
A Dense Hierarchy of Sublinear Time Approximation Schemes for Bin Packing
The bin packing problem is to find the minimum number of bins of size one to pack a list of items with sizes a1,
Richard Beigel, Bin Fu
138
Voted
ICCAD
1996
IEEE
76views Hardware» more  ICCAD 1996»
15 years 11 months ago
Directional bias and non-uniformity in FPGA global routing architectures
This paper investigates the effect of the prefabricated routing track distribution on the area-efficiency of FPGAs. The first question we address is whether horizontal and vertica...
Vaughn Betz, Jonathan Rose
182
Voted
SAT
2004
Springer
117views Hardware» more  SAT 2004»
16 years 26 days ago
A Random Constraint Satisfaction Problem That Seems Hard for DPLL
Abstract. This paper discusses an NP-complete constraint satisfaction problem which appears to share many of the threshold characteristics of SAT but is similar to XOR-SAT and so i...
Harold S. Connamacher