2450 search results - page 259 / 490 » Time Mapping with Hypergraphs |
246
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FPL
2004
Springer
16 years 15 days ago
2004
Springer
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
201
Voted
FSTTCS
2004
Springer
16 years 15 days ago
2004
Springer
A self-stabilizing distributed protocol can recover from any state-corrupting fault. A self-stabilizing protocol is called adaptive if its recovery time is proportional to the numb...
205
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ISAAC
2004
Springer
16 years 14 days ago
2004
Springer
The class of interval probe graphs is introduced to deal with the physical mapping and sequencing of DNA as a generalization of interval graphs. The polynomial time recognition al...
188
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EVOW
2003
Springer
16 years 10 days ago
2003
Springer
Evolutionary Algorithms (EAs) have been proposed as a very powerful heuristic optimization technique to solve complex problems. Many case studies have shown that they work very eff...
189
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DATE
2010
IEEE
16 years 6 days ago
2010
IEEE
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...