Sciweavers

7311 search results - page 1175 / 1463
» Time in State Machines
Sort
View
ISCA
1998
IEEE
107views Hardware» more  ISCA 1998»
15 years 11 months ago
Memory Dependence Prediction Using Store Sets
For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order violations with prior store instructions that wri...
George Z. Chrysos, Joel S. Emer
ASPLOS
1998
ACM
15 years 11 months ago
Overlapping Execution with Transfer Using Non-Strict Execution for Mobile Programs
In order to execute a program on a remote computer, it must first be transferred over a network. This transmission incurs the overhead of network latency before execution can beg...
Chandra Krintz, Brad Calder, Han Bok Lee, Benjamin...
182
Voted
PLDI
1998
ACM
15 years 11 months ago
Improving Performance by Branch Reordering
The conditional branch has long been considered an expensive operation. The relative cost of conditional branches has increased as recently designed machines are now relying on de...
Minghui Yang, Gang-Ryung Uh, David B. Whalley
FPGA
1998
ACM
176views FPGA» more  FPGA 1998»
15 years 11 months ago
A Fast Routability-Driven Router for FPGAs
Three factors are driving the demand for rapid FPGA compilation. First, as FPGAs have grown in logic capacity, the compile computation has grown more quickly than the compute powe...
Jordan S. Swartz, Vaughn Betz, Jonathan Rose
ASAP
1997
IEEE
144views Hardware» more  ASAP 1997»
15 years 11 months ago
Automatic data mapping of signal processing applications
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
Corinne Ancourt, Denis Barthou, Christophe Guettie...
« Prev « First page 1175 / 1463 Last » Next »