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177
Voted
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
16 years 17 days ago
DVS for On-Chip Bus Designs Based on Timing Error Correction
On-chip buses are typically designed to meet performance constraints at worst-case conditions, including process corner, temperature, IR-drop, and neighboring net switching patter...
Himanshu Kaul, Dennis Sylvester, David Blaauw, Tre...
ECRTS
2005
IEEE
16 years 17 days ago
Non-Preemptive Interrupt Scheduling for Safe Reuse of Legacy Drivers in Real-Time Systems
Low-level support of peripheral devices is one of the most demanding activities in a real-time operating system. In fact, the rapid development of new interface boards causes a tr...
Tullio Facchinetti, Giorgio C. Buttazzo, Mauro Mar...
IPPS
2005
IEEE
16 years 16 days ago
End-to-End Quality of Service Management for Distributed Real-Time Embedded Applications
Many of the world’s most critical systems are distributed real-time embedded (DRE) systems, with missioncritical quality of service (QoS) requirements. However, because of their...
Prakash Manghwani, Joseph P. Loyall, Praveen Kaush...
3DIM
2003
IEEE
16 years 7 days ago
Stable Real-Time Interaction Between Virtual Humans And Real Scenes
We present an Augmented Reality system that relies on purely passive techniques to solve the real-time registration problem. It can run on a portable PC and does not require engin...
Luca Vacchetti, Vincent Lepetit, George Papagianna...
197
Voted
DSN
2003
IEEE
16 years 7 days ago
Evaluation of Fault Handling of the Time-Triggered Architecture with Bus and Star Topology
Arbitrary faults of a single node in a time-triggered architecture (TTA) bus topology system may cause error propagation to correct nodes and may lead to inconsistent system state...
Astrit Ademaj, Håkan Sivencrona, Günthe...