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» Using Risk Analysis to Evaluate Design Alternatives
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NAR
2010
129views more  NAR 2010»
15 years 1 months ago
PROSESS: a protein structure evaluation suite and server
PROSESS (PROtein Structure Evaluation Suite and Server) is a web server designed to evaluate and validate protein structures generated by X-ray crystallography, NMR spectroscopy o...
Mark V. Berjanskii, Yongjie Liang, Jianjun Zhou, P...
ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
16 years 4 months ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong
LCPC
1999
Springer
15 years 11 months ago
An Empirical Study of Function Pointers Using SPEC Benchmarks
Since the C language imposes little restriction on the use of function pointers, the task of call graph construction for a C program is far more di cult than what the algorithms d...
Ben-Chung Cheng, Wen-mei W. Hwu
ITC
1996
IEEE
96views Hardware» more  ITC 1996»
15 years 11 months ago
Analysis and Detection of Timing Failures in an Experimental Test Chip
A 25k gate Test Chip was designed and manufactured to evaluate different test methods for scan-designed circuits. The design of the chip, the experiment, and preliminary experimen...
Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin...
CHES
2010
Springer
187views Cryptology» more  CHES 2010»
15 years 8 months ago
Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs - (Full Version)
The power of side-channel leakage attacks on cryptographic implementations is evident. Today's practical defenses are typically attack-specific countermeasures against certain...
Kimmo Järvinen, Vladimir Kolesnikov, Ahmad-Re...