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» Using Risk Analysis to Evaluate Design Alternatives
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DAC
2005
ACM
16 years 8 months ago
A low latency router supporting adaptivity for on-chip interconnects
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
Jongman Kim, Dongkook Park, Theo Theocharides, Nar...
172
Voted
ICWE
2004
Springer
16 years 9 days ago
A Framework for the Simulation of Web Applications
Abstract. In recent years numerous Web application modeling languages have been developed and others improved. There has, however, been little research on how these languages may b...
Pedro Peixoto, K. K. Fung, David Lowe
ICCAD
2009
IEEE
121views Hardware» more  ICCAD 2009»
15 years 4 months ago
MOLES: Malicious off-chip leakage enabled by side-channels
Economic incentives have driven the semiconductor industry to separate design from fabrication in recent years. This trend leads to potential vulnerabilities from untrusted circui...
Lang Lin, Wayne Burleson, Christof Paar
SEMWEB
2009
Springer
16 years 1 months ago
Functions over RDF Language Elements
Spreadsheet tools are often used in business and private scenarios in order to collect and store data, and to explore and analyze these data by executing functions and aggregation...
Bernhard Schandl
174
Voted
ATMOS
2007
124views Optimization» more  ATMOS 2007»
15 years 8 months ago
A Simulation/Optimization Framework for Locomotive Planning
Abstract. In this paper, we give an overview of the Locomotive Simulater/Optimizer (LSO) decision support system developed by us for railroads. This software is designed to imitate...
Artyom G. Nahapetyan, Ravindra K. Ahuja, F. Zeynep...