Sciweavers

4770 search results - page 402 / 954
» Using System-on-a-Programmable-Chip Technology to Design Emb...
Sort
View
LCPC
2007
Springer
16 years 1 months ago
Revisiting SIMD Programming
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
Anton Lokhmotov, Benedict R. Gaster, Alan Mycroft,...
AICT
2006
IEEE
101views Communications» more  AICT 2006»
16 years 1 months ago
Erasure Codes for Increasing the Availability of Grid Data Storage
In this paper, we describe the design of a highlyavailable Grid data storage system. Increased availability is ensured by data redundancy and file striping. Redundant data is com...
Mikko Pitkänen, Rim Moussa, D. Martin Swany, ...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 11 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli
IPPS
2003
IEEE
16 years 21 days ago
Multi-Paradigm Framework for Parallel Image Processing
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
David J. Johnston, Martin Fleury, Andy C. Downton
SLIP
2003
ACM
16 years 20 days ago
Fast estimation of the partitioning rent characteristic using a recursive partitioning model
In the past, a priori interconnect prediction, based on Rent’s rule, has been applied mainly for technology evaluation and roadmap applications. These applications do not requir...
Joni Dambre, Dirk Stroobandt, Jan Van Campenhout