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134
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FCCM
2005
IEEE
113views VLSI» more  FCCM 2005»
16 years 17 days ago
A Comparison of Floating Point and Logarithmic Number Systems for FPGAs
Michael Haselman, Michael J. Beauchamp, Aaron Wood...
168
Voted
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
16 years 16 days ago
Parallelism/regularity-driven MIMO detection algorithm design
Efficient VLSI implementation of multiple-input multiple-output (MIMO) detectors plays an important role in the real-life implementation of MIMO communication systems. However, m...
Tong Zhang, Yan Xin, Sizhong Chen
GLVLSI
2003
IEEE
195views VLSI» more  GLVLSI 2003»
16 years 7 days ago
A pipelined clock-delayed domino carry-lookahead adder
Clock-delayed (CD) domino is a dynamic logic family developed to provide both inverting and non-inverting logic on single-rail gates. It is self-timed and can be easily pipelined ...
Bhushan A. Shinkre, James E. Stine
ISCAS
2003
IEEE
112views Hardware» more  ISCAS 2003»
16 years 7 days ago
Distributed neurochemical sensing: in vitro experiments
Experimental results characterizing a VLSI multi-channel potentiostat sensor system designed for sensing distributed neurotransmitter activity are presented. Neurotransmitter conc...
G. Mulliken, Mihir Naware, A. Bandyopadhyay, Gert ...
123
Voted
VTS
2002
IEEE
108views Hardware» more  VTS 2002»
15 years 12 months ago
An Industrial Environment for High-Level Fault-Tolerant Structures Insertion and Validation
Luis Berrojo, Isabel González, Fulvio Corno...