2449 search results - page 161 / 490 » VLSI |
204
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ISCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
— This paper presents some circuitry for use within a visual-processing depth-recovery algorithm based upon spike timing. The accuracy of the depth calculation relies on a predic...
148
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DFT
2005
IEEE
16 years 18 days ago
2005
IEEE
This paper presents a new jitter component analysis method for mixed mode VLSI chip testing in Automatic Test Equipment (ATE). The separate components are analyzed individually an...
187
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ITCC
2005
IEEE
16 years 17 days ago
2005
IEEE
In many applications a software implementation of ECC (Elliptic Curve Cryptography) might be inappropriate due to performance requirements, therefore hardware implementations are ...
153
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DATE
2003
IEEE
16 years 8 days ago
2003
IEEE
Circuit marginality failures in high performance VLSI circuits are projected to increase due to shrinking process geometries and high frequency design techniques. Capacitive cross...
170
Voted
GLVLSI
2003
IEEE
16 years 8 days ago
2003
IEEE
- A current-mode logic (CML) buffer is based on a simple differential circuit. This paper investigates important problems involved in the design of a CML buffer as well as a chain ...