1399 search results - page 144 / 280 » Verification of Test Suites |
168
click to vote
SIGSOFT
2002
ACM
16 years 7 months ago
2002
ACM
This paper explores the idea that redundant operations, like type errors, commonly flag correctness errors. We experimentally test this idea by writing and applying four redundanc...
202
click to vote
ESTIMEDIA
2003
Springer
16 years 6 days ago
2003
Springer
In order to extensively explore design space one has to specify a n a very abstract level. Transforming a specification into a correct implementation is usually an error prone tas...
172
click to vote
ECRTS
1999
IEEE
15 years 11 months ago
1999
IEEE
We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defin...
195
Voted
FPL
1999
Springer
15 years 11 months ago
1999
Springer
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
200
click to vote
DAC
1996
ACM
15 years 11 months ago
1996
ACM
-- This paper presents an efficient method for the timing verification of concurrent systems, modeled as labeled Timed Petri nets. The verification problems we consider require us ...