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» Verifying VLSI Circuits

127

DAC
1993
ACM

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Performance-Constrained Worst-Case Variability Minimization of VLSI Circuits

15 years 10 months ago

Performance-Constrained Worst-Case Variability Minimization of VLSI Circuits

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Abhijit Dharchoudhury, Sung-Mo Kang

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147

ICCAD
1995
IEEE

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Delay optimal partitioning targeting low power VLSI circuits

15 years 10 months ago

Delay optimal partitioning targeting low power VLSI circuits

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Hirendu Vaishnav, Massoud Pedram

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121

ICCAD
1991
IEEE

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A Systematic Approach for Designing Testable VLSI Circuits

15 years 10 months ago

A Systematic Approach for Designing Testable VLSI Circuits

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Sen-Pin Lin, Charles Njinda, Melvin A. Breuer

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127

TODAES
2002

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Cluster-aware iterative improvement techniques for partitioning large VLSI circuits

15 years 6 months ago

Cluster-aware iterative improvement techniques for partitioning large VLSI circuits

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Shantanu Dutt, Wenyong Deng

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161

ISVLSI
2007
IEEE

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A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator

16 years 23 days ago

A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator

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This paper presents a two-stage CMOS differential voltage-controlled ring oscillator (VCO). The VCO is intended to operate as a frequency synthesizer in a PLL to generate local os...

Luciano Severino de Paula, Eric E. Fabris, Sergio ...

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