736 search results - page 84 / 148 » Virtual Memory: Issues of Implementation |
131
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MICRO
2006
IEEE
16 years 18 days ago
2006
IEEE
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...
152
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ICC
2009
IEEE
16 years 1 months ago
2009
IEEE
—A widespread methodology for performance analysis in the field of communication systems engineering is network simulation. While ns-2 has established itself as virtually the st...
153
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LCN
2005
IEEE
16 years 5 days ago
2005
IEEE
A combined input and crosspoint queued (CICQ) switch with a flow control latency of round-trip time (RTT) packets requires each crosspoint (CP) buffer to hold the RTT packets in o...
188
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FPGA
2007
ACM
16 years 23 days ago
2007
ACM
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
138
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ASPDAC
2004
ACM
16 years 1 days ago
2004
ACM
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...