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196
Voted
DATE
2006
IEEE
16 years 1 months ago
2006
IEEE
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
185
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DFT
2006
IEEE
16 years 1 months ago
2006
IEEE
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
225
Voted
DFT
2006
IEEE
16 years 1 months ago
2006
IEEE
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
213
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DSN
2006
IEEE
16 years 1 months ago
2006
IEEE
This paper considers the eventual leader election problem in asynchronous message-passing systems where an arbitrary number t of processes can crash (t < n, where n is the tota...
196
Voted
ECRTS
2006
IEEE
16 years 1 months ago
2006
IEEE
Due to the complexity and requirements of modern realtime systems, multiple teams must often work concurrently and independently to develop the various components of the system. S...