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CSREAESA
2010
15 years 5 months ago
The First Clock Cycle Is A Real BIST
The primary goal of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) is to completely test all programmable logic and routing resources in the device such that ...
Charles E. Stroud, Bradley F. Dutton
CVPR
2010
IEEE
15 years 5 months ago
Efficient computation of robust low-rank matrix approximations in the presence of missing data using the L1 norm
The calculation of a low-rank approximation of a matrix is a fundamental operation in many computer vision applications. The workhorse of this class of problems has long been the ...
Anders Eriksson, Anton van den Hengel
DATE
2010
IEEE
174views Hardware» more  DATE 2010»
15 years 5 months ago
An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusio
The H.264/AVC video encoder standard significantly improves the compression efficiency by using variable block-sized Inter (P) and Intra (I) Macroblock (MB) coding modes. In this p...
Muhammad Shafique, Bastian Molkenthin, Jörg H...
DLOG
2010
15 years 5 months ago
Towards Soundness Preserving Approximation for ABox Reasoning of OWL2
ABox Reasoning in large scale description logic (DL) knowledge bases, e.g. ontologies, is important for the success of many semantic-enriched systems. Performance of existing appro...
Yuan Ren, Jeff Z. Pan, Yuting Zhao
ECIR
2010
Springer
15 years 5 months ago
Maximum Margin Ranking Algorithms for Information Retrieval
Abstract. Machine learning ranking methods are increasingly applied to ranking tasks in information retrieval (IR). However ranking tasks in IR often differ from standard ranking t...
Shivani Agarwal, Michael Collins