We present the first wait-free and self-stabilizing implementation of a single-writer/single-reader regular register by single-writer/single-reader safe registers. The constructio...
—This paper charts the course of adaptive behavior in intrusion tolerance, starting from pre-programmed and usercontrolled reactive adaptation to highly sophisticated autonomic a...
—We investigate the impact of irrecoverable read errors—also known as bad blocks—on the MTTDL of mirrored disks, RAID level 5 arrays and RAID level 6 arrays. Our study is bas...
Abstract—We address the parallelization of a MonteCarlo search algorithm. On a cluster of 64 cores we obtain a speedup of 56 for the parallelization of Morpion Solitaire. An algo...
Several 64‐processor XMT systems have now been shipped to customers and there have been 128‐processor, 256‐processor and 512‐ processor systems teste...