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    Early and accurate analysis of SoCs: oxymoron or real?
    16 years 14 days ago
    Early and accurate analysis of SoCs: oxymoron or real?
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    Reinaldo A. Bergamaschi
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    A low power approach to system level pipelined interconnect design
    16 years 14 days ago
    A low power approach to system level pipelined interconnect design
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    Vikas Chandra, Anthony Xu, Herman Schmit
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    Evolution as the blind engineer: wiring minimization in the brain
    16 years 14 days ago
    Evolution as the blind engineer: wiring minimization in the brain
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    Dmitri B. Chklovskii
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    Prediction of interconnect net-degree distribution based on Rent's rule
    16 years 14 days ago
    Prediction of interconnect net-degree distribution based on Rent's rule
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    Tao Wan, Malgorzata Chrzanowska-Jeske
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    A 2-slot time-division multiplexing (TDM) interconnect network for gigascale integration (GSI)
    16 years 14 days ago
    A 2-slot time-division multiplexing (TDM) interconnect network for gigascale integration (GSI)
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    Ajay Joshi, Jeffrey A. Davis
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