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188
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DATE
2006
IEEE
16 years 1 months ago
2006
IEEE
It has been proven that scan path is a potent hazard for secure chips. Scan based attacks have been recently demonstrated against DES or AES and several solutions have been presen...
194
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DATE
2006
IEEE
16 years 1 months ago
2006
IEEE
We present an approach to prevent overtesting in scan-based delay test. The test data is transformed with respect to functional constraints while simultaneously keeping as many po...
161
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DATE
2006
IEEE
16 years 1 months ago
2006
IEEE
In this paper we analyze the impact of error detecting codes, implemented on an on-chip bus, on the on-chip simultaneous switching noise (SSN). First, we analyze in detail how SSN...
168
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DATE
2006
IEEE
16 years 1 months ago
2006
IEEE
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
141
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DATE
2006
IEEE
16 years 1 months ago
2006
IEEE
This paper presents novel double sampling high order single-loop sigma-delta modulator structures for wideband applications. To alleviate the quantization noise folding into the i...