Abstract. Well-known hierarchies discriminate between the computational power of discrete time and space dynamical systems. A contrario the situation is more confused for dynamical...
Recently, a new approach to the symbolic model checking of timed automata based on a partial order semantics was introduced, which relies on event zones that use vectors of event o...
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...
The paper presents several improvements to state-of-theart in FPGA technology mapping exemplified by a recent advanced technology mapper DAOmap [Chen and Cong, ICCAD `04]. Improve...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...