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ISCA
2010
IEEE
229views Hardware» more  ISCA 2010»
15 years 5 months ago
Understanding sources of inefficiency in general-purpose chips
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Az...
INFOCOM
1999
IEEE
15 years 11 months ago
New Dynamic SPT Algorithm Based on a Ball-and-String Model
A key functionality in today's widely used interior gateway routing protocols such as OSPF and IS
Paolo Narváez, Kai-Yeung Siu, Hong-Yi Tzeng
TEC
2010
121views more  TEC 2010»
15 years 1 months ago
Brain-Computer Evolutionary Multiobjective Optimization: A Genetic Algorithm Adapting to the Decision Maker
The centrality of the decision maker (DM) is widely recognized in the multiple criteria decision-making community. This translates into emphasis on seamless human
Roberto Battiti, Andrea Passerini
CSREAESA
2006
15 years 8 months ago
Delay-Reduced Combinational Logic Synthesis using Multiplexers
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
Rekha K. James, T. K. Shahana, K. Poulose Jacob, S...
BMCBI
2006
72views more  BMCBI 2006»
15 years 7 months ago
Selecting effective siRNA sequences by using radial basis function network and decision tree learning
Background: Although short interfering RNA (siRNA) has been widely used for studying gene functions in mammalian cells, its gene silencing efficacy varies markedly and there are o...
Shigeru Takasaki, Yoshihiro Kawamura, Akihiko Kona...