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SIAMCOMP
2002
138views more  SIAMCOMP 2002»
15 years 6 months ago
Phase Change of Limit Laws in the Quicksort Recurrence under Varying Toll Functions
We characterize all limit laws of the quicksort type random variables defined recursively by Xn d = XIn + X n-1-In + Tn when the "toll function" Tn varies and satisfies ...
Hsien-Kuei Hwang, Ralph Neininger
166
Voted
DATE
2009
IEEE
109views Hardware» more  DATE 2009»
16 years 1 months ago
Improving yield and reliability of chip multiprocessors
— An increasing number of hardware failures can be attributed to device reliability problems that cause partial system failure or shutdown. In this paper we propose a scheme for ...
Abhisek Pan, Omer Khan, Sandip Kundu
APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
16 years 29 days ago
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding
We propose a high-performance hardware accelerator for intra prediction and mode decision in H.264/AVC video encoding. We use two intra prediction units to increase the performance...
Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-We...
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
16 years 28 days ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
MICRO
2003
IEEE
95views Hardware» more  MICRO 2003»
16 years 4 days ago
Processor Acceleration Through Automated Instruction Set Customization
Application-specific extensions to the computational capabilities of a processor provide an efficient mechanism to meet the growing performance and power demands of embedded appl...
Nathan Clark, Hongtao Zhong, Scott A. Mahlke