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DASIP
2010
15 years 1 months ago
High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...
Christophe Lucarz, Ghislain Roquier, Marco Mattave...
TOOLS
2009
IEEE
16 years 1 months ago
Reusing and Composing Tests with Traits
Single inheritance often forces developers to duplicate code and logic. This widely recognized situation affects both business code and tests. In a large and complex application w...
Stéphane Ducasse, Damien Pollet, Alexandre ...
192
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ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
15 years 10 months ago
Optimization of Instruction Fetch Mechanisms for High Issue Rates
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
ICCV
2007
IEEE
16 years 8 months ago
Discrete camera calibration from the information distance between pixel streams
We consider the problem of estimating the relative orientation of a number of individual photocells -or pixels- that hold fixed relative positions. The photocells measure the inte...
Etienne Grossmann, Francesco Orabona, José ...
KBSE
2005
IEEE
16 years 14 days ago
Automatic test factoring for java
Test factoring creates fast, focused unit tests from slow system-wide tests; each new unit test exercises only a subset of the functionality exercised by the system test. Augmenti...
David Saff, Shay Artzi, Jeff H. Perkins, Michael D...